1. Field of the Invention
This invention relates to an inter-system data communication channel comprised of parallel electrical conductors that simulate the performance of a bit serial, optical communications link.
2. Cross Reference to Related Applications
The present U.S. patent application is related to the following co-pending U.S. patent applications incorporated herein by reference:
Application Ser. No. 08/262,087, filed Jun. 17, 1994 (attorney Docket No. PO9-93-053), entitled "Edge Detector," and assigned to the assignee of this application.
Application Ser. No. 08/261,515, filed Jun. 17, 1994 (attorney Docket No. PO9-93-054), entitled "Self-Timed Interface," and assigned to the assignee of this application.
Application Ser. No. 08/261,561, filed Jun. 17, 1994 (attorney Docket No. PO9-93-057), entitled "Enhanced Input-Output Element," now U.S. Pat. No. 5,513,377 assigned to the assignee of this application.
Application Ser. No. 08/261,603, filed Jun. 17, 1994 (attorney Docket No. PO9-93-058), entitled "Massively Parallel System," and assigned to the assignee of this application.
Application Ser. No. 08/261,523, filed Jun. 17, 1994 (attorney Docket No. PO9-93-059), entitled "Attached Storage Media Link," and assigned to the assignee of this application.
Application Ser. No. 08/261,641, filed Jun. 17, 1994 (attorney Docket No. PO9-93-060), entitled "Shared Channel Subsystem," now U.S. Pat. No. 5,522,088 assigned to the assignee of this application.
3. Description of the Prior Art
As will be appreciated by those skilled in the art, very high speed data communications links are typically bit serial fiber optic links. While generally satisfactory in operation, such fiber optic links are expensive in their implementation.